The Verigy 93000 utilizes a highly scalable, "tester-per-pin" architecture. This means every individual pin on the tester operates independently with its own dedicated resources, maximizing flexibility and minimizing test times. Key Hardware Components
SmarTest is the official software suite used to program, control, and monitor the V93K tester platform. SmarTest Architecture
Houses the power supplies, liquid cooling units, and system control boards.
[System Power Up] ➔ [Load Test Program] ➔ [Calibrate/Diag] ➔ [Contact Test] ➔ [Functional/DC Test] Step 1: System Power-Up and Initialization verigy 93k tester manual
A graphical and hierarchical representation of the execution sequence. It controls the exact path a device takes based on pass/fail criteria.
Controls the execution sequence of individual test suites, defining bins, branching logic on failures, and execution loops. 3. Test Methodology and Programming
Writing a test program on the Verigy 93k follows a structured development pipeline: Controls the execution sequence of individual test suites,
: Details the modern, Java/Eclipse-based integrated development environment (IDE) featuring a component-based test program architecture.
Maintaining the physical integrity and accuracy of an ATE system requires stringent adherence to calibration protocols. System Calibration (System Cal)
Maps the logical names of the DUT pins to the physical channels on the tester cards. water cooling heat exchangers
For Windows 10/11, you must install the standalone TDC application first, then download the specific documentation packages (e.g., Smart Scale or EXA Scale).
93k Tester 02 Hardware Overview Rev.7.2.2.A.00 | PDF - Scribd
Contains system power supplies, water cooling heat exchangers, and the primary system controller.